Textures are used heavily within the field of computer graphics processing. Textures may be used to represent surface properties, illumination (e.g. within the environment of a scene being imaged) or to apply surface detail to an object being rendered. Textures may require relatively large amounts of memory storage, and texture accesses can contribute a significant proportion of a graphics device's memory bandwidth. As such, it is often desirable to compress texture data.
There exist various texture compression schemes, or formats. One class of texture compression schemes are known as block-based schemes. In a block based scheme, the compressed texture data is encoded in a series of data blocks of a given size (e.g. 64 or 128 bits). Each data block encodes the texture data for a particular block of texels of the texture (e.g. a 2×2, or 4×4 block of texels). Examples of block-based texture compression schemes include, for example, PowerVR Texture Compression (PVRTC), PVRTC2, S3 Texture Compression (S3TC, also known as BC1, BC2 and BC3); Adaptive Scalable Texture Compression (ASTC); Ericsson Texture Compression (ETC); ETC2; EAC; 3Dc (also known as BC4 and BC5); BC6 and BC7.
It is often desirable for a graphics system to decode a plurality of texels simultaneously, or in parallel, in order to improve performance of the system when rendering a scene. A further motivation arises from the fact that, in many graphics applications, texels to be decoded can be grouped together into groups of multiple texels. For example, in many graphics pipelines the texture colour to be applied to a particular pixel being processed is obtained by filtering a plurality of neighbouring texels mapped to that pixel. Thus, when processing the pixel, multiple texels may need to be decoded to be used in the filtering operation to obtain the final texture colour for that pixel. Some graphics systems may additionally process multiple pixels concurrently, each of which may require multiple texels to be decoded as part of a filtering operation.
An effective way of handling this demand for decoding multiple texels (from a performance standpoint) is to simply have a requisite number of decoders each operating in parallel such that the total number of texels that can be decoded in parallel matches or exceeds the number of texels in a given texel request. However, this approach suffers from the drawback of high hardware requirements, which may manifest as large circuitry area. For example, simply having ‘n’ decoders operate in parallel in order to handle the texture requests at a desired performance level results in decoder circuitry that is commensurately ‘n’ times as large.